#!/bin/bash

gSIM_WAVE=1
gSIM_COV=0
FPGA_SYN=1


if [ -n "$1" ]
then 
    COV_NAME=$1
    export $COV_NAME
else 
    echo "$COV_NAME" 
fi

#========================================================================================
#Define
#========================================================================================
DEF_CFG=""
if [ $FPGA_SYN == 1 ]
then
    DEF_CFG="$DEF_CFG +define+FPGA_SYN=1"
else
    DEF_CFG="$DEF_CFG +define+ "
fi



#========================================================================================
#SRAM libs
#========================================================================================

LIB_FILE=""

if [ $FPGA_SYN == 1 ] 
then
    LIB_FILE="$LIB_FILE ../../../libs/FPGA_SYN/SRAM/ram_bfm.v"
else
    LIB_FILE="$LIB_FILE ../../../libs/DP_SRAM/SRAM_4096_32_rtl.v"
    LIB_FILE="$LIB_FILE ../../../libs/DP_SRAM/SRAM_4096_32.v"
    LIB_FILE="$LIB_FILE ../../../libs/mem/sp_sram_8192_32/S55NLLGSPH_X512Y16D32_BW.v" 
fi

#========================================================================================
# VCS SIMCFG 
#========================================================================================



SRAM_CELL=" +libext+ $LIB_FILE"
SIM_CFG="-f module_file_list  tbtop.v -top tbtop -timescale=1ns/1ns -full64 $SRAM_CELL $DEF_CFG -R  +vc  +v2k  -sverilog   +lint=TFIPC-L -debug_access -l vcs.log"


if [ $gSIM_WAVE == 1 ]
then
    SIM_CFG="$SIM_CFG -fsdb" 
fi

if [ $gSIM_COV == 1 ]
then
    SIM_CFG="$SIM_CFG -cm line+cond+branch+tgl -cm_line contassign -cm_hier ./../config/coverage.cfg -cm_dir ../Cov_file/simv.vdb  -cm_name $COV_NAME"
fi


echo $SIM_CFG


